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STM32H743 + more: DMA stream locked when transferring data to/from USART #72790

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HelligeChris opened this issue May 15, 2024 · 6 comments
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bug The issue is a bug, or the PR is fixing a bug platform: STM32 ST Micro STM32 priority: low Low impact/importance bug

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@HelligeChris
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HelligeChris commented May 15, 2024

Describe the bug
Using the UART async driver, when a USART is issuing a DMA request to transfer data, if a concurrent transfer occurs, the requested transfer may not be served, and the DMA stream may stay locked. This causes the UART async driver to lock up and stop sending packages (uart_tx keeps reporting EBUSY).

To Reproduce
Using the board stm32h743Xi.dtsi

Steps to reproduce the behavior:

  1. Use UART async driver
  2. Setup DMA to use another stream and trigger on timer (we used a DMA to update DAC output at 1MHz)
  3. Create while loop that keeps sending messages through UART
  4. The fault is sporadic, though on our system the UART sent 3~10 messages before locking up

Expected behavior
The UART kept sending messages without locking up

Impact
We used a workaround where we manually set bit 20 in DMA_SxCR on UART streams.

Environment (please complete the following information):

  • OS: Linux
  • Toolchain GCC 12.3.1
  • Zephyr 3.6.0

Additional context
Issue is described in the stm32h7 errata section 2.20.6 and effect the following microcontrollers:

  • STM32H742xI/G
  • STM32H743xI/G
  • STM32H750xB
  • STM32H753xI
@HelligeChris HelligeChris added the bug The issue is a bug, or the PR is fixing a bug label May 15, 2024
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Hi @HelligeChris! We appreciate you submitting your first issue for our open-source project. 🌟

Even though I'm a bot, I can assure you that the whole community is genuinely grateful for your time and effort. 🤖💙

@henrikbrixandersen
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Please use our bug template when reporting bugs. You need to edit this issue to include the information requested in https://github.com/zephyrproject-rtos/zephyr/blob/main/.github/ISSUE_TEMPLATE/001_bug_report.md

@HelligeChris
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Please use our bug template when reporting bugs. You need to edit this issue to include the information requested in https://github.com/zephyrproject-rtos/zephyr/blob/main/.github/ISSUE_TEMPLATE/001_bug_report.md

Hey, I reformatted the issue, though the "Steps to reproduce" section leaves much to be desired...

@erwango erwango assigned ajarmouni-st and unassigned erwango May 15, 2024
@ajarmouni-st
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ajarmouni-st commented May 15, 2024

Hi @HelligeChris

if a concurrent transfer occurs,

By this you mean another UART DMA transfer or another DMA transfer from any other device?

@ajarmouni-st
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ajarmouni-st commented May 15, 2024

Hi @HelligeChris

if a concurrent transfer occurs,

By this you mean another UART DMA transfer or another DMA transfer from any other device?

okey, I just noticed

we used a DMA to update DAC output at 1MHz

So it's the 2nd case right?

@HelligeChris
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HelligeChris commented May 15, 2024

Hi @ajarmouni-st, from what I can see in the errata it shouldn't matter if it's a UART DMA transfer or DMA transfer to the DAC. Since both the UART and DAC request the DMA to transfer data, though we only noticed it when using the DMA to update the DAC while the also having the UART running.

This is properly because the DAC was requesting DMA transfers so quickly.

@nashif nashif added the priority: low Low impact/importance bug label May 21, 2024
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bug The issue is a bug, or the PR is fixing a bug platform: STM32 ST Micro STM32 priority: low Low impact/importance bug
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